More EDA Throughput Without More DRAM

For semiconductor teams, memory is increasingly becoming the bottleneck limiting engineering productivity. As chip designs grow more complex and AI-driven EDA flows add even larger models, datasets, and iterations, the cost of keeping enough DRAM in the system continues to climb. The result is a familiar problem: overprovisioned servers and expensive infrastructure decisions made just to avoid the memory cliff.

MEXT was built to counteract this challenge.

A major semiconductor company recently completed a full suite of EDA tests with MEXT. Across the board, they witnessed near-equivalent time-to-results vs all-DRAM baseline systems even after removing 50% of the DRAM and replacing it with MEXT Memory™. This extrapolates to mean that, if MEXT was added to the original system, it could add 2X more EDA capacity for the same budget.

For a signoff application, the 512GB all-DRAM baseline was effectively matched by a system using 256GB of DRAM plus 256GB of MEXT Memory™. On top of this, even more aggressive reductions remained highly competitive (in contrast to reduced-DRAM systems without MEXT, which experienced out-of-memory crashes). The observed results illustrate a 2.1X higher performance-per-dollar with 50% DRAM reduction, 2.7X with 62.5% DRAM reduction, and 3.2X with 75% DRAM reduction. In a separate 1.5TB baseline scenario, a 50% DRAM reduction with MEXT still delivered 88% of baseline performance, translating to 1.76X higher performance-per-dollar.

The takeaway is simple: getting more EDA throughput does not always require buying more DRAM. With MEXT, semiconductor teams can stretch existing hardware further, avoid costly overprovisioning, and run larger memory-bound workloads more efficiently. And because MEXT is software-only, requires no changes to operating systems or applications, and installs in less than five minutes, it can be deployed quickly across on-prem or cloud environments.